457 lines
20 KiB
C
457 lines
20 KiB
C
#pragma once
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#include <stdbool.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <iron_global.h>
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#include <iron_math.h>
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#include <iron_gpu.h>
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#include <iron_array.h>
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#include BACKEND_GPU_H
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#define IRON_GPU_CLEAR_COLOR 1
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#define IRON_GPU_CLEAR_DEPTH 2
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enum iron_internal_render_target_state {
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IRON_INTERNAL_RENDER_TARGET_STATE_RENDER_TARGET,
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IRON_INTERNAL_RENDER_TARGET_STATE_TEXTURE
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};
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typedef enum iron_image_compression {
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IRON_IMAGE_COMPRESSION_NONE,
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IRON_IMAGE_COMPRESSION_DXT5,
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IRON_IMAGE_COMPRESSION_ASTC
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} iron_image_compression_t;
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typedef enum iron_image_format {
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IRON_IMAGE_FORMAT_RGBA32,
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IRON_IMAGE_FORMAT_RGBA64,
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IRON_IMAGE_FORMAT_RGBA128,
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IRON_IMAGE_FORMAT_R8,
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IRON_IMAGE_FORMAT_R16,
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IRON_IMAGE_FORMAT_R32,
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IRON_IMAGE_FORMAT_BGRA32
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} iron_image_format_t;
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typedef struct iron_gpu_texture {
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int width;
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int height;
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iron_image_format_t format;
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iron_image_compression_t compression;
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void *data;
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bool _uploaded;
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int framebuffer_index;
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bool isDepthAttachment;
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enum iron_internal_render_target_state state;
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buffer_t *buffer;
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gpu_texture_impl_t impl;
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} iron_gpu_texture_t;
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typedef struct iron_gpu_buffer {
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int myCount;
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uint8_t *data;
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gpu_buffer_impl_t impl;
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} iron_gpu_buffer_t;
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int iron_gpu_max_bound_textures(void);
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void iron_gpu_begin(iron_gpu_texture_t *renderTarget);
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void iron_gpu_end(void);
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bool iron_gpu_swap_buffers(void);
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void iron_gpu_internal_init(void);
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void iron_gpu_internal_init_window(int depth_buffer_bits, bool vsync);
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void iron_gpu_internal_destroy_window(void);
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void iron_gpu_internal_destroy(void);
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struct iron_gpu_pipeline;
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struct iron_gpu_texture;
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struct iron_gpu_texture_unit;
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struct iron_gpu_constant_location;
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struct iron_gpu_buffer;
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typedef enum {
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GPU_TEXTURE_ADDRESSING_REPEAT,
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GPU_TEXTURE_ADDRESSING_MIRROR,
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GPU_TEXTURE_ADDRESSING_CLAMP,
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GPU_TEXTURE_ADDRESSING_BORDER
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} gpu_texture_addressing_t;
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typedef enum {
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GPU_TEXTURE_DIRECTION_U,
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GPU_TEXTURE_DIRECTION_V
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} gpu_texture_direction_t;
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typedef enum {
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GPU_TEXTURE_FILTER_POINT,
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GPU_TEXTURE_FILTER_LINEAR,
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GPU_TEXTURE_FILTER_ANISOTROPIC
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} gpu_texture_filter_t;
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typedef enum {
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GPU_MIPMAP_FILTER_NONE,
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GPU_MIPMAP_FILTER_POINT,
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GPU_MIPMAP_FILTER_LINEAR // linear texture filter + linear mip filter -> trilinear filter
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} gpu_mipmap_filter_t;
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typedef enum {
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GPU_USAGE_STATIC,
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GPU_USAGE_DYNAMIC,
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GPU_USAGE_READABLE
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} gpu_usage_t;
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void gpu_begin();
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void gpu_end();
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void iron_gpu_clear(unsigned color, float depth, unsigned flags);
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void gpu_viewport(int x, int y, int width, int height);
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void gpu_scissor(int x, int y, int width, int height);
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void gpu_disable_scissor(void);
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void iron_gpu_draw_indexed_vertices(void);
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void iron_gpu_draw_indexed_vertices_from_to(int start, int count);
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void gpu_set_texture_addressing(struct iron_gpu_texture_unit unit, gpu_texture_direction_t dir, gpu_texture_addressing_t addressing);
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void iron_gpu_set_pipeline(struct iron_gpu_pipeline *pipeline);
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void gpu_set_int(struct iron_gpu_constant_location *location, int value);
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void gpu_set_int2(struct iron_gpu_constant_location *location, int value1, int value2);
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void gpu_set_int3(struct iron_gpu_constant_location *location, int value1, int value2, int value3);
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void gpu_set_int4(struct iron_gpu_constant_location *location, int value1, int value2, int value3, int value4);
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void gpu_set_ints(struct iron_gpu_constant_location *location, int *values, int count);
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void gpu_set_float(struct iron_gpu_constant_location *location, float value);
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void gpu_set_float2(struct iron_gpu_constant_location *location, float value1, float value2);
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void gpu_set_float3(struct iron_gpu_constant_location *location, float value1, float value2, float value3);
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void gpu_set_float4(struct iron_gpu_constant_location *location, float value1, float value2, float value3, float value4);
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void gpu_set_floats(struct iron_gpu_constant_location *location, f32_array_t *values);
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void gpu_set_bool(struct iron_gpu_constant_location *location, bool value);
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void gpu_set_matrix3(struct iron_gpu_constant_location *location, iron_matrix3x3_t value);
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void gpu_set_matrix4(struct iron_gpu_constant_location *location, iron_matrix4x4_t value);
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void gpu_set_texture_magnification_filter(struct iron_gpu_texture_unit unit, gpu_texture_filter_t filter);
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void gpu_set_texture_minification_filter(struct iron_gpu_texture_unit unit, gpu_texture_filter_t filter);
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void gpu_set_texture_mipmap_filter(struct iron_gpu_texture_unit unit, gpu_mipmap_filter_t filter);
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void gpu_restore_render_target(void);
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void gpu_set_render_targets(struct iron_gpu_texture **targets, int count);
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void gpu_set_texture(struct iron_gpu_texture_unit *unit, struct iron_gpu_texture *texture);
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void gpu_set_index_buffer(iron_gpu_buffer_t *buffer);
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void gpu_internal_init_window(int depth_buffer_bits, bool vsync);
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void gpu_set_texture_depth(struct iron_gpu_texture_unit *unit, struct iron_gpu_texture *renderTarget);
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void gpu_index_buffer_unlock_all(iron_gpu_buffer_t *buffer);
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void gpu_index_buffer_unlock(iron_gpu_buffer_t *buffer, int count);
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#define IRON_GPU_MAX_VERTEX_ELEMENTS 16
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typedef enum iron_gpu_vertex_data {
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IRON_GPU_VERTEX_DATA_F32_1X = 0,
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IRON_GPU_VERTEX_DATA_F32_2X = 1,
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IRON_GPU_VERTEX_DATA_F32_3X = 2,
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IRON_GPU_VERTEX_DATA_F32_4X = 3,
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IRON_GPU_VERTEX_DATA_U8_4X_NORM = 4,
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IRON_GPU_VERTEX_DATA_I16_2X_NORM = 5,
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IRON_GPU_VERTEX_DATA_I16_4X_NORM = 6,
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} iron_gpu_vertex_data_t;
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typedef struct iron_gpu_vertex_element {
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const char *name;
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iron_gpu_vertex_data_t data;
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} iron_gpu_vertex_element_t;
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typedef struct iron_gpu_vertex_structure {
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iron_gpu_vertex_element_t elements[IRON_GPU_MAX_VERTEX_ELEMENTS];
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int size;
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} iron_gpu_vertex_structure_t;
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static inline int iron_gpu_vertex_data_size(iron_gpu_vertex_data_t data) {
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switch (data) {
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case IRON_GPU_VERTEX_DATA_F32_1X:
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return 1 * 4;
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case IRON_GPU_VERTEX_DATA_F32_2X:
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return 2 * 4;
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case IRON_GPU_VERTEX_DATA_F32_3X:
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return 3 * 4;
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case IRON_GPU_VERTEX_DATA_F32_4X:
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return 4 * 4;
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case IRON_GPU_VERTEX_DATA_U8_4X_NORM:
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return 4 * 1;
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case IRON_GPU_VERTEX_DATA_I16_2X_NORM:
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return 2 * 2;
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case IRON_GPU_VERTEX_DATA_I16_4X_NORM:
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return 4 * 2;
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}
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}
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static inline int iron_gpu_vertex_struct_size(iron_gpu_vertex_structure_t *s) {
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int size = 0;
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for (int i = 0; i < s->size; ++i) {
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size += iron_gpu_vertex_data_size(s->elements[i].data);
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}
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return size;
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}
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void iron_gpu_vertex_structure_init(iron_gpu_vertex_structure_t *structure);
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void iron_gpu_vertex_structure_add(iron_gpu_vertex_structure_t *structure, const char *name, iron_gpu_vertex_data_t data);
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void iron_gpu_texture_init(iron_gpu_texture_t *texture, int width, int height, iron_image_format_t format);
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void iron_gpu_texture_init_from_bytes(iron_gpu_texture_t *texture, void *data, int width, int height, iron_image_format_t format);
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void iron_gpu_texture_destroy(iron_gpu_texture_t *texture);
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void iron_gpu_texture_generate_mipmaps(iron_gpu_texture_t *texture, int levels);
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void iron_gpu_texture_set_mipmap(iron_gpu_texture_t *texture, iron_gpu_texture_t *mipmap, int level);
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int iron_gpu_texture_stride(iron_gpu_texture_t *texture);
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struct iron_gpu_texture_unit;
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void iron_gpu_render_target_init(iron_gpu_texture_t *target, int width, int height, iron_image_format_t format, int depthBufferBits);
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void iron_gpu_render_target_init_framebuffer(iron_gpu_texture_t *target, int width, int height, iron_image_format_t format, int depthBufferBits);
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void iron_gpu_render_target_set_depth_from(iron_gpu_texture_t *target, iron_gpu_texture_t *source);
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void iron_gpu_vertex_buffer_init(iron_gpu_buffer_t *buffer, int count, iron_gpu_vertex_structure_t *structure, bool gpu_memory);
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void iron_gpu_vertex_buffer_destroy(iron_gpu_buffer_t *buffer);
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float *iron_gpu_vertex_buffer_lock_all(iron_gpu_buffer_t *buffer);
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float *iron_gpu_vertex_buffer_lock(iron_gpu_buffer_t *buffer, int start, int count);
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void iron_gpu_vertex_buffer_unlock_all(iron_gpu_buffer_t *buffer);
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void iron_gpu_vertex_buffer_unlock(iron_gpu_buffer_t *buffer, int count);
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int iron_gpu_vertex_buffer_count(iron_gpu_buffer_t *buffer);
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int iron_gpu_vertex_buffer_stride(iron_gpu_buffer_t *buffer);
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int iron_gpu_internal_vertex_buffer_set(iron_gpu_buffer_t *buffer);
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void gpu_vertex_buffer_init(iron_gpu_buffer_t *buffer, int count, iron_gpu_vertex_structure_t *structure, gpu_usage_t usage);
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float *gpu_vertex_buffer_lock_all(iron_gpu_buffer_t *buffer);
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float *gpu_vertex_buffer_lock(iron_gpu_buffer_t *buffer, int start, int count);
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void gpu_set_vertex_buffer(iron_gpu_buffer_t *buffer);
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void iron_gpu_constant_buffer_init(iron_gpu_buffer_t *buffer, int size);
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void iron_gpu_constant_buffer_destroy(iron_gpu_buffer_t *buffer);
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void iron_gpu_constant_buffer_lock_all(iron_gpu_buffer_t *buffer);
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void iron_gpu_constant_buffer_lock(iron_gpu_buffer_t *buffer, int start, int count);
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void iron_gpu_constant_buffer_unlock(iron_gpu_buffer_t *buffer);
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int iron_gpu_constant_buffer_size(iron_gpu_buffer_t *buffer);
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void iron_gpu_constant_buffer_set_bool(iron_gpu_buffer_t *buffer, int offset, bool value);
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void iron_gpu_constant_buffer_set_int(iron_gpu_buffer_t *buffer, int offset, int value);
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void iron_gpu_constant_buffer_set_int2(iron_gpu_buffer_t *buffer, int offset, int value1, int value2);
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void iron_gpu_constant_buffer_set_int3(iron_gpu_buffer_t *buffer, int offset, int value1, int value2, int value3);
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void iron_gpu_constant_buffer_set_int4(iron_gpu_buffer_t *buffer, int offset, int value1, int value2, int value3, int value4);
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void iron_gpu_constant_buffer_set_ints(iron_gpu_buffer_t *buffer, int offset, int *values, int count);
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void iron_gpu_constant_buffer_set_float(iron_gpu_buffer_t *buffer, int offset, float value);
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void iron_gpu_constant_buffer_set_float2(iron_gpu_buffer_t *buffer, int offset, float value1, float value2);
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void iron_gpu_constant_buffer_set_float3(iron_gpu_buffer_t *buffer, int offset, float value1, float value2, float value3);
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void iron_gpu_constant_buffer_set_float4(iron_gpu_buffer_t *buffer, int offset, float value1, float value2, float value3, float value4);
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void iron_gpu_constant_buffer_set_floats(iron_gpu_buffer_t *buffer, int offset, float *values, int count);
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void iron_gpu_constant_buffer_set_matrix3(iron_gpu_buffer_t *buffer, int offset, iron_matrix3x3_t *value);
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void iron_gpu_constant_buffer_set_matrix4(iron_gpu_buffer_t *buffer, int offset, iron_matrix4x4_t *value);
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extern bool iron_gpu_transpose_mat;
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void iron_gpu_index_buffer_init(iron_gpu_buffer_t *buffer, int count, bool gpu_memory);
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void iron_gpu_index_buffer_destroy(iron_gpu_buffer_t *buffer);
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void *iron_gpu_index_buffer_lock_all(iron_gpu_buffer_t *buffer);
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void *iron_gpu_index_buffer_lock(iron_gpu_buffer_t *buffer, int start, int count);
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void iron_gpu_index_buffer_unlock_all(iron_gpu_buffer_t *buffer);
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void iron_gpu_index_buffer_unlock(iron_gpu_buffer_t *buffer, int count);
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int iron_gpu_index_buffer_count(iron_gpu_buffer_t *buffer);
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typedef enum iron_gpu_shader_type {
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IRON_GPU_SHADER_TYPE_FRAGMENT,
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IRON_GPU_SHADER_TYPE_VERTEX,
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IRON_GPU_SHADER_TYPE_COUNT
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} iron_gpu_shader_type_t;
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typedef enum {
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IRON_GPU_BLEND_ONE,
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IRON_GPU_BLEND_ZERO,
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IRON_GPU_BLEND_SOURCE_ALPHA,
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IRON_GPU_BLEND_DEST_ALPHA,
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IRON_GPU_BLEND_INV_SOURCE_ALPHA,
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IRON_GPU_BLEND_INV_DEST_ALPHA,
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IRON_GPU_BLEND_SOURCE_COLOR,
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IRON_GPU_BLEND_DEST_COLOR,
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IRON_GPU_BLEND_INV_SOURCE_COLOR,
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IRON_GPU_BLEND_INV_DEST_COLOR,
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IRON_GPU_BLEND_CONSTANT,
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IRON_GPU_BLEND_INV_CONSTANT
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} iron_gpu_blending_factor_t;
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typedef enum {
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IRON_GPU_BLENDOP_ADD,
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IRON_GPU_BLENDOP_SUBTRACT,
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IRON_GPU_BLENDOP_REVERSE_SUBTRACT,
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IRON_GPU_BLENDOP_MIN,
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IRON_GPU_BLENDOP_MAX
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} iron_gpu_blending_operation_t;
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typedef enum iron_gpu_cull_mode {
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IRON_GPU_CULL_MODE_CLOCKWISE,
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IRON_GPU_CULL_MODE_COUNTERCLOCKWISE,
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IRON_GPU_CULL_MODE_NEVER
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} iron_gpu_cull_mode_t;
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typedef enum iron_gpu_compare_mode {
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IRON_GPU_COMPARE_MODE_ALWAYS,
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IRON_GPU_COMPARE_MODE_NEVER,
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IRON_GPU_COMPARE_MODE_EQUAL,
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IRON_GPU_COMPARE_MODE_NOT_EQUAL,
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IRON_GPU_COMPARE_MODE_LESS,
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IRON_GPU_COMPARE_MODE_LESS_EQUAL,
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IRON_GPU_COMPARE_MODE_GREATER,
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IRON_GPU_COMPARE_MODE_GREATER_EQUAL
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} iron_gpu_compare_mode_t;
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typedef enum iron_gpu_texture_addressing {
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IRON_GPU_TEXTURE_ADDRESSING_REPEAT,
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IRON_GPU_TEXTURE_ADDRESSING_MIRROR,
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IRON_GPU_TEXTURE_ADDRESSING_CLAMP,
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IRON_GPU_TEXTURE_ADDRESSING_BORDER
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} iron_gpu_texture_addressing_t;
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typedef enum iron_gpu_texture_filter {
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IRON_GPU_TEXTURE_FILTER_POINT,
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IRON_GPU_TEXTURE_FILTER_LINEAR,
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IRON_GPU_TEXTURE_FILTER_ANISOTROPIC
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} iron_gpu_texture_filter_t;
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typedef enum iron_gpu_mipmap_filter {
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IRON_GPU_MIPMAP_FILTER_NONE,
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IRON_GPU_MIPMAP_FILTER_POINT,
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IRON_GPU_MIPMAP_FILTER_LINEAR // linear texture filter + linear mip filter -> trilinear filter
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} iron_gpu_mipmap_filter_t;
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typedef struct iron_gpu_constant_location {
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gpu_constant_location_impl_t impl;
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} iron_gpu_constant_location_t;
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typedef struct iron_gpu_texture_unit {
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int stages[IRON_GPU_SHADER_TYPE_COUNT];
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} iron_gpu_texture_unit_t;
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typedef struct iron_gpu_shader {
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gpu_shader_impl_t impl;
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} iron_gpu_shader_t;
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typedef struct iron_gpu_pipeline {
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iron_gpu_vertex_structure_t *input_layout;
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iron_gpu_shader_t *vertex_shader;
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iron_gpu_shader_t *fragment_shader;
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iron_gpu_cull_mode_t cull_mode;
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bool depth_write;
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iron_gpu_compare_mode_t depth_mode;
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// One, Zero deactivates blending
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iron_gpu_blending_factor_t blend_source;
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iron_gpu_blending_factor_t blend_destination;
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iron_gpu_blending_operation_t blend_operation;
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iron_gpu_blending_factor_t alpha_blend_source;
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iron_gpu_blending_factor_t alpha_blend_destination;
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iron_gpu_blending_operation_t alpha_blend_operation;
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bool color_write_mask_red[8]; // Per render target
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bool color_write_mask_green[8];
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bool color_write_mask_blue[8];
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bool color_write_mask_alpha[8];
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iron_image_format_t color_attachment[8];
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int color_attachment_count;
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int depth_attachment_bits;
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gpu_pipeline_impl_t impl;
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} iron_gpu_pipeline_t;
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typedef struct iron_gpu_sampler_options {
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iron_gpu_texture_addressing_t u_addressing;
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iron_gpu_texture_addressing_t v_addressing;
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iron_gpu_texture_filter_t minification_filter;
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iron_gpu_texture_filter_t magnification_filter;
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iron_gpu_mipmap_filter_t mipmap_filter;
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} iron_gpu_sampler_options_t;
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typedef struct iron_gpu_sampler {
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gpu_sampler_impl_t impl;
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} iron_gpu_sampler_t;
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void iron_gpu_pipeline_init(iron_gpu_pipeline_t *pipeline);
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void iron_gpu_internal_pipeline_init(iron_gpu_pipeline_t *pipeline);
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void iron_gpu_pipeline_destroy(iron_gpu_pipeline_t *pipeline);
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void iron_gpu_pipeline_compile(iron_gpu_pipeline_t *pipeline);
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iron_gpu_constant_location_t iron_gpu_pipeline_get_constant_location(iron_gpu_pipeline_t *pipeline, const char *name);
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iron_gpu_texture_unit_t iron_gpu_pipeline_get_texture_unit(iron_gpu_pipeline_t *pipeline, const char *name);
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void iron_gpu_shader_init(iron_gpu_shader_t *shader, const void *source, size_t length, iron_gpu_shader_type_t type);
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void iron_gpu_shader_destroy(iron_gpu_shader_t *shader);
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void iron_gpu_sampler_options_set_defaults(iron_gpu_sampler_options_t *options);
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void iron_gpu_sampler_init(iron_gpu_sampler_t *sampler, const iron_gpu_sampler_options_t *options);
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void iron_gpu_sampler_destroy(iron_gpu_sampler_t *sampler);
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void iron_gpu_internal_pipeline_set_defaults(iron_gpu_pipeline_t *pipeline);
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struct iron_gpu_pipeline;
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struct iron_gpu_texture;
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struct iron_gpu_command_list;
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struct iron_gpu_buffer;
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typedef struct iron_gpu_command_list {
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gpu_command_list_impl_t impl;
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} iron_gpu_command_list_t;
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void iron_gpu_command_list_init(iron_gpu_command_list_t *list);
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void iron_gpu_command_list_destroy(iron_gpu_command_list_t *list);
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void iron_gpu_command_list_begin(iron_gpu_command_list_t *list);
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void iron_gpu_command_list_end(iron_gpu_command_list_t *list);
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void iron_gpu_command_list_clear(iron_gpu_command_list_t *list, struct iron_gpu_texture *render_target, unsigned flags, unsigned color, float depth);
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void iron_gpu_command_list_render_target_to_framebuffer_barrier(iron_gpu_command_list_t *list, struct iron_gpu_texture *renderTarget);
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void iron_gpu_command_list_framebuffer_to_render_target_barrier(iron_gpu_command_list_t *list, struct iron_gpu_texture *renderTarget);
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void iron_gpu_command_list_texture_to_render_target_barrier(iron_gpu_command_list_t *list, struct iron_gpu_texture *renderTarget);
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void iron_gpu_command_list_render_target_to_texture_barrier(iron_gpu_command_list_t *list, struct iron_gpu_texture *renderTarget);
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void iron_gpu_command_list_draw_indexed_vertices(iron_gpu_command_list_t *list);
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void iron_gpu_command_list_draw_indexed_vertices_from_to(iron_gpu_command_list_t *list, int start, int count);
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void iron_gpu_command_list_viewport(iron_gpu_command_list_t *list, int x, int y, int width, int height);
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void iron_gpu_command_list_scissor(iron_gpu_command_list_t *list, int x, int y, int width, int height);
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void iron_gpu_command_list_disable_scissor(iron_gpu_command_list_t *list);
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void iron_gpu_command_list_set_pipeline(iron_gpu_command_list_t *list, struct iron_gpu_pipeline *pipeline);
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void iron_gpu_command_list_set_vertex_buffer(iron_gpu_command_list_t *list, iron_gpu_buffer_t *buffer);
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void iron_gpu_command_list_set_index_buffer(iron_gpu_command_list_t *list, iron_gpu_buffer_t *buffer);
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void iron_gpu_command_list_set_render_targets(iron_gpu_command_list_t *list, struct iron_gpu_texture **targets, int count);
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void iron_gpu_command_list_upload_index_buffer(iron_gpu_command_list_t *list, iron_gpu_buffer_t *buffer);
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void iron_gpu_command_list_upload_vertex_buffer(iron_gpu_command_list_t *list, struct iron_gpu_buffer *buffer);
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void iron_gpu_command_list_upload_texture(iron_gpu_command_list_t *list, struct iron_gpu_texture *texture);
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void iron_gpu_command_list_set_vertex_constant_buffer(iron_gpu_command_list_t *list, iron_gpu_buffer_t *buffer, int offset, size_t size);
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void iron_gpu_command_list_set_fragment_constant_buffer(iron_gpu_command_list_t *list, iron_gpu_buffer_t *buffer, int offset, size_t size);
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void iron_gpu_command_list_execute(iron_gpu_command_list_t *list);
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void iron_gpu_command_list_wait_for_execution_to_finish(iron_gpu_command_list_t *list);
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void iron_gpu_command_list_get_render_target_pixels(iron_gpu_command_list_t *list, struct iron_gpu_texture *render_target, uint8_t *data);
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void iron_gpu_command_list_set_texture(iron_gpu_command_list_t *list, iron_gpu_texture_unit_t unit, iron_gpu_texture_t *texture);
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void iron_gpu_command_list_set_texture_from_render_target_depth(iron_gpu_command_list_t *list, iron_gpu_texture_unit_t unit, iron_gpu_texture_t *target);
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void iron_gpu_command_list_set_sampler(iron_gpu_command_list_t *list, iron_gpu_texture_unit_t unit, iron_gpu_sampler_t *sampler);
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void iron_gpu_render_target_get_pixels(iron_gpu_texture_t *render_target, uint8_t *data);
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typedef struct iron_gpu_raytrace_pipeline {
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iron_gpu_buffer_t *_constant_buffer;
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gpu_raytrace_pipeline_impl_t impl;
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} iron_gpu_raytrace_pipeline_t;
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typedef struct iron_gpu_raytrace_acceleration_structure {
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gpu_raytrace_acceleration_structure_impl_t impl;
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} iron_gpu_raytrace_acceleration_structure_t;
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bool iron_gpu_raytrace_supported(void);
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void iron_gpu_raytrace_pipeline_init(iron_gpu_raytrace_pipeline_t *pipeline, struct iron_gpu_command_list *command_list,
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void *ray_shader, int ray_shader_size, struct iron_gpu_buffer *constant_buffer);
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void iron_gpu_raytrace_pipeline_destroy(iron_gpu_raytrace_pipeline_t *pipeline);
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void iron_gpu_raytrace_acceleration_structure_init(iron_gpu_raytrace_acceleration_structure_t *accel);
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void iron_gpu_raytrace_acceleration_structure_add(iron_gpu_raytrace_acceleration_structure_t *accel, struct iron_gpu_buffer *vb, struct iron_gpu_buffer *ib, iron_matrix4x4_t transform);
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void iron_gpu_raytrace_acceleration_structure_build(iron_gpu_raytrace_acceleration_structure_t *accel, struct iron_gpu_command_list *command_list,
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struct iron_gpu_buffer *_vb_full, struct iron_gpu_buffer *_ib_full);
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void iron_gpu_raytrace_acceleration_structure_destroy(iron_gpu_raytrace_acceleration_structure_t *accel);
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void iron_gpu_raytrace_set_textures(struct iron_gpu_texture *texpaint0, struct iron_gpu_texture *texpaint1, struct iron_gpu_texture *texpaint2,
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struct iron_gpu_texture *texenv, struct iron_gpu_texture *texsobol, struct iron_gpu_texture *texscramble, struct iron_gpu_texture *texrank);
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void iron_gpu_raytrace_set_acceleration_structure(iron_gpu_raytrace_acceleration_structure_t *accel);
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void iron_gpu_raytrace_set_pipeline(iron_gpu_raytrace_pipeline_t *pipeline);
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void iron_gpu_raytrace_set_target(struct iron_gpu_texture *output);
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void iron_gpu_raytrace_dispatch_rays(struct iron_gpu_command_list *command_list);
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